发明名称 Apparatus and methods for high voltage variable capacitor arrays with body-to-gate diodes
摘要 Apparatus and methods for high voltage variable capacitors are provided herein. In certain configurations, an integrated circuit (IC) includes a variable capacitor array and a bias voltage generation circuit that biases the variable capacitor array to control the array's capacitance. The variable capacitor array includes a plurality of variable capacitor cells electrically connected in parallel between a radio frequency (RF) input and an RF output of the IC. Additionally, each of the variable capacitor cells can include a cascade of two or more pairs of anti-series metal oxide semiconductor (MOS) capacitors between the RF input and the RF output. The pairs of anti-series MOS capacitors include a first MOS capacitor and a second MOS capacitor electrically connected in anti-series. The bias voltage generation circuit generates bias voltages for biasing the MOS capacitors of the variable capacitor cells.
申请公布号 US9515631(B2) 申请公布日期 2016.12.06
申请号 US201514705429 申请日期 2015.05.06
申请人 TDK Corporation 发明人 Madan Anuj;Gupta Dev V.;Lai Zhiguo
分类号 H03H7/01;H01G7/00;H01L27/08;H03H7/06;H03H1/02;H03H11/04;H03H11/28;H03H1/00 主分类号 H03H7/01
代理机构 Nixon Peabody LLP 代理人 Nixon Peabody LLP
主权项 1. An integrated circuit comprising: a variable capacitor array including at least three variable capacitor cells electrically connected in parallel between a radio frequency (RF) input and an RF output, wherein each of the at least three variable capacitor cells includes: two or more pairs of anti-series metal oxide semiconductor (MOS) capacitors electrically connected in series between the RF input and the RF output, wherein a first pair of the two or more pairs of anti-series MOS capacitors comprises a first MOS capacitor and a second MOS capacitor electrically connected in anti-series, and wherein a second pair of the two or more pairs of anti-series MOS capacitors comprises a third MOS capacitor and a fourth MOS capacitor electrically connected in anti-series; anda plurality of diodes configured to control a plurality of body voltages of the two or more pairs of anti-series MOS capacitors of each of the at least three variable capacitor cells to increase a power handling capability of each of the at least three variable capacitor cells,wherein the integrated circuit does not include any switches along a signal path between the RF input and the RF output through the variable capacitor array.
地址 Tokyo JP