发明名称 III-V MOSFET with strained channel and semi-insulating bottom barrier
摘要 Embodiments include a method for fabricating a semiconductor device and the resulting structure comprising forming a semi-insulating bottom barrier on a semiconductor substrate. A channel is formed on the bottom barrier. A semi-insulating layer is epitaxially formed on the bottom barrier, laterally adjacent to the channel. The semi-insulating layer is formed in such a way that stress is induced onto the channel. A CMOS transistor is formed on the channel.
申请公布号 US9472667(B2) 申请公布日期 2016.10.18
申请号 US201514592130 申请日期 2015.01.08
申请人 International Business Machines Corporation 发明人 Basu Anirban;Cohen Guy;Majumdar Amlan
分类号 H01L29/10;H01L29/78;H01L29/66;H01L29/20 主分类号 H01L29/10
代理机构 代理人 Wixted, III Edward J.
主权项 1. A semiconductor device comprising: a substrate; a bottom barrier formed on the substrate, wherein the bottom barrier is semi-insulating; a channel formed on the bottom barrier; a gate structure formed on the channel; a source region and a drain region formed laterally adjacent to the gate structure; a semi-insulating layer epitaxially formed laterally adjacent to the channel on the bottom barrier, wherein the semi-insulating layer induces a strain onto the channel.
地址 Armonk NY US