| 摘要 |
1451492 Semi-conductor devices PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd 23 Sept 1973 [23 Sept 1972] 44129/73 Heading H1K An electronic switch which has been set in its off-state is caused to revert after a predetermined "switching time" to its on-state by a timing mechanism including a field-effect transistor in which the channel region is initially entirely closed by a depletion region formed by a voltage applied to the gate electrode and in which the thickness of the depletion region is subsequently reduced as a function of time, reopening the channel, as a consequence of the generation of charge carriers, either thermally or in response to incident radiation or forward biasing of an appropriately located rectifying generation. In Fig. 3, the output terminals 2, 3 of the switch are connected to source and drain regions 7, 8 of an IGFET which constitutes both the timing mechanism and the switch itself. To set the switch in its off-state a voltage pulse from source 10 is applied to gate electrode 9, thereby causing depletion region 6 to extend completely across channel region 5 and to isolate the source and drain regions 7, 8. In this embodiment the regions 5, 7 and 8 are all portions of an n type Si epitaxial layer 12 on a p type substrate 13. Thermal generation of charge carriers in the depletion region 6, preferably enhanced by carriers generated by the absorption of incident radiation 11, produces an inversion layer at the surface of the depletion region 6 and reduces the thickness of the latter, resulting, after a predetermined "switching time", in the reopening of the channel and hence the switching of the device back to its on-state. Variation of the bias across the pn junction between the substrate 13 and the epitaxial layer 12 varies the thickness of the associated depletion region 19, and this can be used to adjust the response of the switch to the wavelength of radiation 11, since the penetration depth of the radiation is wavelength-dependent and carriers generated by radiation absorbed in the depletion region 19 do not contribute to the collapse of the depletion region 6. Fig. 9 shows a modification in which the external terminals 2 (not shown), 3 of the switch are located on the source and drain regions 41, 42 of a junction-gate FET T2 the conducting condition of the channel region 45 of which determines whether the switch is in its on or off-states. The timing mechanism is constituted by another junction-gate FET T 1 . The two transistors Ti, T2 share a common gate connection through a p-type Si substrate 48 on which is deposited an n-type epitaxial layer 47 which contains the source and drain regions 31, 32 and channel region 33 of the timing transistor T 1 and the source and drain regions 41, 42 and channel region 45 of the switch transistor T2. The source regions 31, 41 of the two transistors share a common portion. The thickness of channel region 33 of T 1 is less than that of T 2 due to the presence of an inset oxide layer 52 over the former. Collapse of the depletion region 30 of T 1 is enhanced by carriers injected from a forward biased p-n junction 38, and this collapse suddenly accelerates to provide rapid switching when the region 30 recedes to the extent that channel 33 of T 1 begins to conduct, since this increases the rate of carrier injection from another forward-biased p-n junction 37. A timed switched in accordance with the invention may be integrated conventionally with other circuit elements. Instead of controlling the switching of an FET channel the timing mechanism may control the switching time of one or more relays. Fig. 13 (not shown) illustrates a circuit used to control the exposure time of a photographic plate (75). The switch here comprises an FET (T) connected across a magnetic relay (71) which controls the flow of current through a light source (73). The switching time of the FET (T) thus determines the exposure time.
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