发明名称 Wiring substrate and method for manufacturing wiring substrate
摘要 A wiring substrate includes an insulating layer, a wiring layer, a via wiring, and a solder resist layer. The wiring layer includes a pad body that constitutes a part of a pad and a wiring pattern including an upper surface. The pad includes the pad body, a first metal layer formed on an upper surface of the pad body and including an embedded part embedded in the insulating layer and a projecting part including upper and side surfaces and projecting from the upper surface of the insulating layer, and a second metal layer including an upper surface and covering the upper and side surfaces of the projecting part. The upper surface of the pad body and the upper surface of the wiring pattern are on the same plane. The upper surface of the second metal layer is positioned lower than the upper surface of the solder resist layer.
申请公布号 US9515018(B2) 申请公布日期 2016.12.06
申请号 US201615193479 申请日期 2016.06.27
申请人 SHINKO ELECTRIC INDUSTRIES CO., LTD. 发明人 Suzuki Tomohiro
分类号 H05K1/09;H05K1/00;H05K1/11;H05K7/10;H01L23/498;H01L21/48;H01L23/00;H01L21/56;H01L23/31 主分类号 H05K1/09
代理机构 IPUSA, PLLC 代理人 IPUSA, PLLC
主权项 1. A wiring substrate comprising: an insulating layer including upper and lower surfaces; a wiring layer including upper, lower, and side surfaces and being in a position that is recessed relative to the upper surface of the insulating layer; a via wiring formed in the insulating layer and connected to the lower surface of the wiring layer; and a solder resist layer formed on the upper surface of the insulating layer; wherein the via wiring includes a first part contacting the lower surface of the wiring layer and a second part exposed from the lower surface of the insulating layer, the first part having an area smaller than an area of the second part, wherein the wiring layer includes a pad body that constitutes a part of a pad and a wiring pattern including an upper surface, wherein the solder resist layer includes an upper surface and an opening that exposes the pad, wherein the solder resist layer buries a step part formed by the upper surface of the insulating layer and the upper surface of the wiring pattern, wherein the pad includes the pad body including upper and lower surfaces, the lower surface of the pad body contacting the first part of the via wiring,a first metal layer formed on the upper surface of the pad body, the first metal layer including an embedded part embedded in the insulating layer and a projecting part projecting from the upper surface of the insulating layer, the projecting part including upper and side surfaces of the first metal layer which is exposed from the upper surface of the insulating layer, anda second metal layer including an upper surface and covering the upper and side surfaces of the projecting part of the first metal layer, wherein the upper surface of the pad body and the upper surface of the wiring pattern are on the same plane, and wherein the upper surface of the second metal layer is positioned lower than the upper surface of the solder resist layer.
地址 Nagano JP