Process for fabricating SOI transistors for an increased integration density

摘要

A process for fabricating field-effect transistors, including providing a first semiconductor band surmounted with a first semiconductor layer; providing a second semiconductor band surmounted with a second semiconductor layer; providing a buried insulating layer; providing a deep trench isolation passing through the buried insulating layer and isolating the first semiconductor band from the second semiconductor band; etching the first semiconductor band so as to form a first row of semiconductor islands; etching the second semiconductor band so as to form a second row of semiconductor islands; and forming sacrificial gates on the first semiconductor layer and on the second semiconductor layer.

主权项

1. A process for fabricating field-effect transistors, comprising:
providing a first semiconductor band extending in a first direction and surmounted with a first semiconductor layer having a resistivity lower than that of the first band; providing a second semiconductor band extending in the first direction and surmounted with a second semiconductor layer having a resistivity lower than that of the second band; providing a buried insulating layer insulating a semiconductor substrate from said first and second semiconductor bands; providing a deep trench isolation passing through said buried insulating layer and isolating said first semiconductor band from said second semiconductor band; etching the first semiconductor band and the first semiconductor layer in a second direction perpendicular to the first direction so as to form a first row of semiconductor islands that are isolated from one another; etching the second semiconductor band and the second semiconductor layer in said second direction so as to form a second row of semiconductor islands that are isolated from one another, said etches being carried out to a depth smaller than that of the deep trench isolation; forming sacrificial gates on said first semiconductor layer and on said second semiconductor layer; forming spacers on either side of said sacrificial gates; encapsulating the sacrificial gates in an insulator; removing said sacrificial gates in order to form grooves between said spacers in said insulator; removing the first semiconductor layer and the second semiconductor layer at the bottom of said grooves so as to reach said first and second semiconductor bands, respectively; and then forming gates between said spacers in said grooves.