Multi-step deep reactive ion etching fabrication process for silicon-based terahertz components

摘要

A multi-step silicon etching process has been developed to fabricate silicon-based terahertz (THz) waveguide components. This technique provides precise dimensional control across multiple etch depths with batch processing capabilities. Nonlinear and passive components such as mixers and multipliers waveguides, hybrids, OMTs and twists have been fabricated and integrated into a small silicon package. This fabrication technique enables a wafer-stacking architecture to provide ultra-compact multi-pixel receiver front-ends in the THz range.

主权项

1. A method of manufacturing a silicon waveguide circuit element, comprising the steps of:
providing a silicon wafer having a surface comprising a flat surface; providing a SiO2 layer having an initial thickness on said surface; etching a plurality N of patterns in said SiO2 layer, to form a plurality N of SiO2 patterns having a respective thickness representing a respective depth of etching into said silicon wafer, said respective thicknesses being different from one another, where N is an integer greater than one; and repeating a total of N times in succession the two steps of:
(1) performing an SiO2 etch simultaneously on all of said plurality N of SiO2 patterns to expose one or more respective regions of said surface of said silicon wafer beneath a thinnest remaining one of said plurality N of SiO2 patterns; and(2) performing a silicon etch simultaneously on said silicon wafer below all of said exposed respective regions of said surface of said silicon wafer, wherein said exposed respective regions are etched down by a depth comprising a difference between said respective depth, associated with said thinnest remaining one of said plurality N of SiO2 patterns, and said respective depth associated with a next thinnest remaining one of said plurality N of SiO2 patterns; wherein:
each of said plurality N of patterns are etched down into said silicon wafer to their respective depth of etching, and a multi depth structure in said silicon wafer is formed.