Semiconductor memory device including circuits with data holding capability and bus for data transmission

摘要

A semiconductor memory device includes a sense amplifier, and the sense amplifier includes a bus, first and second latch circuits, and a third transistor. The first latch circuit includes a first transistor connected to the bus, and the second latch circuit includes a second transistor connected to the bus. When data is transmitted from the first latch circuit to the second latch circuit, a third transistor is switched on to precharge the bus by applying a first voltage that is lower than a power source voltage of the first and second latch circuits to a gate of the third transistor. Thereafter, second and third voltages that are lower than the power source voltage are applied to gates of first and second transistors, respectively.

主权项

1. A semiconductor memory device comprising:
a memory cell array that includes multiple memory cells; a first circuit configured to be capable of holding data, the first circuit including a first transistor; a second circuit configured to be capable of holding the data, the second circuit including a second transistor; a first bus that can transmit the data, the first bus being electrically connected to a first terminal of the first transistor and a first terminal of the second transistor, wherein when the data is transmitted from the first circuit to the second circuit, a first voltage is applied to a gate of the first transistor, a second voltage is applied to a gate of the second transistor, and the first voltage is higher than the second voltage.