发明名称 APPARATUS AND METHOD FOR EXTENDED CACHE CORRECTION
摘要 An apparatus includes a semiconductor fuse array, a cache memory, and a plurality of cores. The semiconductor fuse array is disposed on a die, into which is programmed the configuration data. The semiconductor fuse array has a first plurality of semiconductor fuses that is configured to store compressed cache correction data. The cache memory is disposed on the die. The plurality of cores is disposed on the die, where each of the plurality of cores is coupled to the semiconductor fuse array and the cache memory, and is configured to access the semiconductor fuse array upon power-up/reset, to decompress the compressed cache correction data, and to distribute decompressed cached correction data to initialize the cache memory.
申请公布号 US2016321192(A1) 申请公布日期 2016.11.03
申请号 US201615206524 申请日期 2016.07.11
申请人 VIA ALLIANCE SEMICONDUCTOR CO., LTD. 发明人 HENRY G. GLENN;JAIN DINESH K.
分类号 G06F12/128;G11C17/18;G06F12/0811;G11C17/16 主分类号 G06F12/128
代理机构 代理人
主权项 1. An apparatus for providing configuration data to an integrated circuit, the apparatus comprising: a semiconductor die, comprising: a semiconductor fuse array, into which is programmed the configuration data, said semiconductor fuse array comprising: a first plurality of semiconductor fuses, configured to store compressed cache correction data, wherein said first plurality of semiconductor fuses comprises a second plurality of semiconductor fuses that indicates one or more sub-unit locations within a cache memory that are not to be employed during normal operation, and wherein said first plurality of semiconductor fuses further comprises a third plurality of semiconductor fuses that indicates one or more replacement sub-unit locations within said cache memory that are to be employed during normal operation in replacement of corresponding ones of said one or more sub-unit locations;said cache memory; anda plurality of cores, wherein each of said plurality of cores is coupled to said semiconductor fuse array and said cache memory, and is configured to access said semiconductor fuse array upon power-up/reset, to decompress said compressed cache correction data, and to distribute decompressed cache correction data to initialize said cache memory.
地址 Shanghai CN