CHIP STARTING METHOD, MULTI-CORE PROCESSOR CHIP AND STORAGE MEDIUM

摘要

A chip starting method, a multi-core processor chip and a storage medium. The chip starting method comprises: setting a first starting priority for more than two processors, and separately setting, for each processor, a second priority of starting each storage unit in more than two storage units; determining, according to the first priority, a first processor that is to be started and has the highest priority; the first processor successively loading a start program from each storage unit according to the second priority corresponding to the first processor, and executing the start program to perform an initialization operation; ending program loading of the first processor when loading of the start program from any storage unit in the more than two storage units succeeds, or loading of the start program from all storage units in the more than two storage units fails; and starting program loading of the second processor and so on until program loading of the more than two processors is completed.

主权项

1. A chip starting method for use in a multi-core processor chip which at least comprises more than two processors and more than two storage units, comprising: setting a first priority queue of starting the more than two processors, and setting a second priority queue of starting each of the more than two storage units for each processor; and further comprising:
determining, according to the first priority queue, a first processor which is to be started and has a highest priority; successively loading, by the first processor, a start program from each storage unit according to the second priority queue corresponding to the first processor, and executing the start program to perform an initialization operation; ending the program loading of the first processor when the loading of the start program from any one of the more than two storage units succeeds, or the loading of the start program from all of the more than two storage units fails; and starting the program loading of a second processor until the program loading of the more than two processors is completed.