| 发明名称 | Semiconductor package, fabrication method therefor, and package-on package | ||
| 摘要 | Provided is a method of manufacturing a semiconductor package including a through wiring having precision and a low process defect. The semiconductor package includes an insulating substrate including a first through portion and a second through portion; a through wiring which fills the first through portion, and is located to penetrate the insulating substrate; a semiconductor chip which is located in the second through portion, and is electrically connected to the through wiring; a molding member molding the semiconductor chip and the insulating substrate; and a re-wiring pattern layer which is located at a lower side of the insulating substrate, and electrically connects the through wiring and the semiconductor chip. | ||
| 申请公布号 | US9502391(B2) | 申请公布日期 | 2016.11.22 |
| 申请号 | US201314404005 | 申请日期 | 2013.05.09 |
| 申请人 | NEPES CO., LTD. | 发明人 | Kwon Yong-Tae;Park Kyung-Hoon |
| 分类号 | H01L23/02;H01L25/10;H01L23/00;H01L23/538;H01L21/56;H01L23/31;H01L23/498;H01L25/065 | 主分类号 | H01L23/02 |
| 代理机构 | Renaissance IP Law Group LLP | 代理人 | Renaissance IP Law Group LLP |
| 主权项 | 1. A semiconductor package, comprising: an insulating substrate including a first through portion and a second through portion; a through wiring which fills the first through portion, and is located to penetrate the insulating substrate; a semiconductor chip which is located in the second through portion, and is electrically connected to the through wiring; a molding member covering the semiconductor chip and the insulating substrate, filling a space between the semiconductor chip and the insulating substrate, and having an epoxy mold compound; an upper pad located on the through wiring and electrically connected to the through wiring; a lower pad located under the through wiring and electrically connected to the through wiring; and a re-wiring pattern layer which is located at a lower side of the insulating substrate, and electrically connects the through wiring and a semiconductor chip pad, wherein the molding member above the upper pad is removed to expose the upper pad so that the molding member has a recess region above the upper pad, wherein the semiconductor chip and the insulating substrate have different thicknesses, and wherein the molding member fills a space between the insulating substrate and the re-wiring pattern layer. | ||
| 地址 | KR | ||