发明名称 |
Frequency synthesiser circuit for TV receiver - has memory system controlling variable frequency divider to select wanted frequency |
摘要 |
<p>The frequency synthesiser, is designed for use in a TV receiver. It has an oscillator whose frequency can be varied to accord with that of a given channel or type of receiver. The output of the oscillator circuit is frequency divided by a divider circuit whose denominator is selected according to the wanted frequency. The divider is controlled by a single memory. This memory may be subdivided into two parts or two entirely separate memories may be used.</p> |
申请公布号 |
FR2418592(A1) |
申请公布日期 |
1979.09.21 |
申请号 |
FR19790004428 |
申请日期 |
1979.02.21 |
申请人 |
PLESSEY HANDEL INVESTMENTS AG |
发明人 |
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分类号 |
H04N5/44;H03J5/02;H03J7/06;H03L7/193;H04B1/26;(IPC1-7):04N5/48;03J5/24 |
主分类号 |
H04N5/44 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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