| 摘要 |
<p>A memory device (10) includes a circuit for reducing the number of pins or external terminals on the memory device (10). A threshold detector (49) within the circuit detects the difference in voltage between signals applied at two external pins (C<u0>u, F<u0>u). A clocking signal at one pin (C<u0>u) provides, in addition to a synchronizing function, a memory device select function, and a signal at the other pin (F<u0>u) provides memory mode select as well as memory address, data input and data output functions. Switching transistors (24, 28) controlled by the output of the threshold detector (40) connect the external pins (C<u0>u, F<u0>u) to the power and ground terminals of an internal power supply (16) so that the signals at the two external pins (C<u0>u, F<u0>u) also provide the power and ground signals to the memory device (10).</p> |
