| 摘要 |
PURPOSE:To perform serial-parallel conversion at a simple and small sized circuit, by providing a shift register of (N+1)-stage, where N is bit number to be converted, and a final stage shift register status discriminating circuit. CONSTITUTION:A serial-parallel conversion circuit of, e.g., 8 bits consists of a shift register circuit 11 comprising FF1-FF9 and a final stage shift register status discriminating circuit 12. When a serial-parallel converting start signal S is given, the FF1 is set on and the FF2-9 are set off. A serial data is set from the FF1 to the next stage FFs one after another at serial data sampling clock phi1 and eight sets of phi1 are inputted, the FFs are set on. A logical product circuit 20 turns on a load signal, a logical product circuit 21 outputs a preset signal via a logical sum circuit 22 and sets the FF1 on and the FF2-9 off again. Serial-parallel conversion at each 8 bits can be done by repeating this operation. |
