发明名称 INTEGRATED CIRCUIT FOR ELECTRONIC TIMEPIECE WITH ALARM
摘要 PURPOSE:To select an alarm sound freely according to contents programmed in a PLA (rogrammable logic array) by forming signals for obtaining a variety of alarm sounds having various patterns previously. CONSTITUTION:In the PLA8, various programs are writable only by converting a mask during the manufacturing of an integrated circuit and the output of the PLA8 is impressed to NAND gates 23-35 impressed with outputs (a)-(j) of a gate circuit 6 and outputs K, L, and M at the other-side inputs and also impressed to an inverter 36. For this purpose, the NAND gates 23-35 or inverter 36 is selected optionally according to the program in the PLA8 to select the generation pattern of an alarm sound. To the PLA8, an alarm control signal ALS, outputs Q1, Q2, and Q3 of flip-flops 45, 46, and 47, and a level Vss, i.e. ''0'' are impressed.
申请公布号 JPS58160885(A) 申请公布日期 1983.09.24
申请号 JP19820044249 申请日期 1982.03.18
申请人 SANYO DENKI KK;TOKYO SANYO DENKI KK 发明人 OKUYAMA YASUHIKO;NAKAMURA TADAO
分类号 G04G13/00;G04C21/02;G04G13/02;G04G99/00;G10H1/00;G10K15/04 主分类号 G04G13/00
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