Secured comparison method of two operands and corresponding device

摘要

A first operation of comparison of the first initial operand with the second initial operand uses at least one comparison operator in such a way as to obtain a first final result word. A second operation of comparison of the second initial operand with the first initial operand uses the at least one comparison operator in such a way as to obtain a second final result word. Another operation checks the values of the bits of the two final result words in relation to a part at least of r combinations of reference values taken from possible combinations of values of these two final result words. These reference combinations represent a valid result of comparison of the two operands including an equality, a relationship of inferiority and a relationship of superiority between the two operands.

主权项

1. A method of secure comparison, the method comprising:
performing a first comparison operation of a first initial operand with a second initial operand using at least one comparison operator in such a way as to obtain a first final result word having p bits, wherein the first and second initial operands each have b bits and where p is less than b; performing a second comparison operation of the second initial operand with the first initial operand using the at least one comparison operator in such a way as to obtain a second final result word having p bits; and checking the values of the bits of the first and second final result words in relation to a part of r combinations of reference values taken from 22p possible combinations of values of the first and second final result words, r being less than 22p, wherein the reference combination represent a valid result of comparison of the first and second initial operands including an equality, a relationship of inferiority and a relationship of superiority between the first and second initial operands; and addressing memory of a storage device using address information generated from the first and second final result words; and controlling operation of an integrated circuit according to contents of the memory at a location indicated by the address information.