发明名称 FREQUENCY ADJUSTING CIRCUIT OF ELECTRONIC TIMEPIECE
摘要 PURPOSE:To decrease the number of pins of an IC by reading the frequency division ratio of a programmable frequency divider externally as serial data, and converting this serial data into parallel data and setting it as the frequency division ratio in the programmable frequency divider. CONSTITUTION:An input reading circuit 16 inputs a serial signal TP indicating the frequency division ratio of a programmable frequency dividing circuit 2c and a clock signal CL and they are stored as parallel data in a frequency division ratio storage circuit 14. The data in the frequency division ratio storage circuit 14 is written in a nonvolatile memory in the programmable frequency dividing circuit 2c, setting the frequency division ratio by the memory.
申请公布号 JPS5956189(A) 申请公布日期 1984.03.31
申请号 JP19820167983 申请日期 1982.09.25
申请人 RHYTHM TOKEI KOGYO KK 发明人 MIYASAKA HIROSHI
分类号 G04G3/02 主分类号 G04G3/02
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