| 摘要 |
PURPOSE:To eliminate the generation of nonlinear distortion owing to the variance of a resistance value and characteristics of an MOSFET by avoiding the use of two MOSFETs to an analog multiplier but using a single MOSFET in time division. CONSTITUTION:The sum (VRF+Va) of bias voltage VRF and signal voltage Va is impressed to the drain side input of an MOSFET; while the sum (VB+Vb) of bias voltage VB and signal voltage Vb and the voltage VB are impressed alternately to the gate side of the MOSFET via a switch S1. The source side of the MOSFET is connected to an inverse input terminal of an operational amplifier OP101, and the voltage of the source side is kept at the voltage VRF which is impressed to a non-inverse input terminal. Both voltages VRF and VB are set so that the MOSFET wors in a triode area. The voltage proportional to the current flowing to the MOSFET is held by capacitors C2 and C3 respectively in response to each signal voltage. A multiplication output is obtained at the output of an operational amplifier OP102 when switches S5 and S7 are closed. |
