发明名称 SEMICONDUCTOR MEMORY
摘要 PURPOSE:To constitute data write/read only with unipolar MOSFETs by giving a signal in response to a signal of a bit line to a data input/output line at read and transferring a signal of a data input/output line at write to the bit line. CONSTITUTION:The potential of sense input/output lines S, S' is decided when a write data is given to an input/output terminal. In case of the selection by a column selection signal Y, the signals S, S' are transferred to data input/output lines D, D', a control signal phi2 is brought into an H level so as to write data to a memory cell. The bit line group selected by the inputted address precharges the bit lines B, B' to the equi-potential by a signal phi5 and when the precharge is finished, the potential starts changing. When the data B, B' are read in a latch circuit, the potential of the signals S, S' transferred to an input/output buffer is determined. The data of a memory cell is read with the potential of the drain of the MOSFET in ON-state and the potential of the S, S' at L level for one and H level for the other by means of the signal phi1.
申请公布号 JPS60136990(A) 申请公布日期 1985.07.20
申请号 JP19830250431 申请日期 1983.12.26
申请人 MATSUSHITA DENKI SANGYO KK 发明人 YAMAGUCHI SEIJI;ICHINOHE EISUKE
分类号 G11C11/419;G11C11/34;H01L21/8244;H01L27/10;H01L27/11 主分类号 G11C11/419
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