Integrable receiver circuit

摘要

In an integrable receiver circuit with a two-phase oscillator, two mixers supplied with an input signal and in each case an oscillator signal and two IF amplifiers connected to the mixer outputs, a third mixer is controlled by the first IF amplifier and by the first output of a second, controllable two-phase oscillator and a fourth mixer by the second IF amplifier and by the second output of the second two-phase oscillator. The output signals of the third and fourth mixers are signed and summed in a summing circuit and fed according to the PLL principle via a loop filter to the control input of the second two-phase oscillator.