| 摘要 |
<p>A single-chip microprogram sequence controller which can be selectively operated in either an interrupt mode or a trapped mode. In the interrupt mode, the microprogram sequencer allows the currently-executing microinstruction to finish execution before beginning the interrupt routine which services the asynchronous event which requested the interruption of the presently-executing microinstruction stream. In the trap mode, the sequencer aborts the currently-executing microinstruction to avoid an irreversible error which would result if the microinstruction were to finish execution before beginning the routine which services the event which requested trapping of the presently-executing microinstruction. Depending on the mode selected, the sequencer stores the address on a last-in, first-out stack of either the next-following microinstruction or the currently-executing microinstruction for return to the proper point in the microinstruction stream upon completion of the routine which requested the interrupt or the trap.</p> |
