Random logic error detecting system for differential logic networks.

摘要

A system for testing a differential logic network (10) is provided which includes a differential exclusive OR circuit (12) having a plurality of inputs for receiving complementary' signals A,A;B,) from the differential logic network and first and second output terminals (Q,Q) and means, including a conventional exclusive OR circuit (26), for determining the voltage difference between the first and second output terminals (Q,Q) to indicate the presence or absence of a fault or error in the differential logic network (10) under test.