Multiple channel length finFETs with same physical gate length

摘要

A semiconductor structure includes a first finFET device including a first fin, a first gate electrode structure on sidewalls and an upper surface of the first fin, a first channel region beneath the first gate electrode structure, and first source and drain regions in the first fin on opposite sides of the first channel region, and a second finFET device including a second fin, a second gate electrode structure on sidewalls and an upper surface of the second fin, a second channel region beneath the second gate electrode structure, and second source and drain regions in the second fin on opposite sides of the second channel region. The second gate electrode structure has a second physical gate length that is substantially the same as a first physical gate length of the first gate electrode structure, and the second finFET device has a second effective channel length that is different from a first effective channel length of the first gate electrode structure.

主权项

1. A semiconductor structure, comprising;
a first finFET device including a first fin, a first gate electrode structure on sidewalls and an upper surface of the first fin, a first channel region beneath the first gate electrode structure, and first source and drain regions in the first fin on opposite sides of the first channel region, the first gate electrode structure including a first gate metal and first sidewall spacers; and a second finFET device including a second fin, a second gate electrode structure on sidewalls and an upper surface of the second fin, a second channel region beneath the second gate electrode structure, and second source and drain regions in the second fin on opposite sides of the second channel region, the second gate electrode structure including a second gate metal and second sidewall spacers; wherein the first finFET device and the second finFET device have a same device type; wherein the first gate electrode structure has a first physical gate length Lgate1 and the second gate electrode structure has a second physical gate length Lgate2 that is substantially the same as the first physical gate length Lgate1; wherein the first finFET device has a first effective channel length Leff1 and the second finFET device has a second effective channel length Left2 that is different from the first effective channel length Leff1; wherein the first source and drain regions are nrovided in first fin recesses in the first fin and the second source and drain regions are provided in second fin recesses in the second fin, wherein each of the first fin recesses has a first vertical extent and a first lateral extent, wherein each of the second fin recesses has a second vertical extent and a second lateral extent: and wherein each of the first fin recesses in the first fin is more vertical than the second fin recesses in the second fin, and wherein each of the second fin recesses has a more rounded recess etch profile than the first fin recesses, wherein the second fin recesses are rounded away from the second gate electro e structure to increase an average effective channel length of the second finFET device along a height of the second fin.