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发明名称
METHOD OF MOUNTING ON PATTERNS NEAR TERMINALS OF HYBRID INTEGRATED CIRCUIT
摘要
申请公布号
JPS62163391(A)
申请公布日期
1987.07.20
申请号
JP19860005264
申请日期
1986.01.14
申请人
FUJITSU LTD
发明人
HIROSE ATSUKO;MURASE HIROSHI
分类号
H05K1/18;H05K3/34
主分类号
H05K1/18
代理机构
代理人
主权项
地址
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