| 摘要 |
PURPOSE:To improve the reliability and efficiency by providing a semiconductor layer including an abrupt junction formed by an n(p) channel semiconductor and a p(n) channel semiconductor, a piezoelectric layer laminated on the semiconductor layer and at least >=2 electrodes formed on the piezoelectric layer. CONSTITUTION:The n(p) channel semiconductor layer 12 includes an n<+>(p<+>) channel semiconductor layer 12a and an n(p) channel semiconductor layer 12b formed thereupon, and a p<+>(n<+> channel semiconductor layer 14' is laminated and formed as a junction on the semiconductor layer 12b. An epitaxial layer is grown on the semiconductor layer 12a as the n(p) channel semiconductor layer 12b to form the hyper abrupt junction 18 by injecting or diffusion positive or negative ions to the layer. A C-V characteristic curve is obtained on the junction face by the abrupt junction 18 formed by the semiconductor layer 12b and the semiconductor layer 14'. Thus, the degree of the change in the capacitance of the depletion layer to the applied voltage is much increased. Signal input and reference signal input interdigital electrodes 20, 22 are arranged on the piezoelectric layer 16. Thus, the efficiency of the element and the reliability because of the monolithic structure are improved.
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