发明名称 IMAGING DEVICE, METHOD FOR DRIVING IMAGING DEVICE, AND ELECTRONIC DEVICE
摘要 An imaging device capable of obtaining high-quality imaging data is provided. The imaging device includes a photoelectric conversion element, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, and a first capacitor. Variation in the threshold voltage of amplifier transistors can be compensated. Furthermore, the imaging device can have a difference detecting function for holding differential data between imaging data for an initial frame and imaging data for a current frame and outputting a signal corresponding to the differential data.
申请公布号 US2016316159(A1) 申请公布日期 2016.10.27
申请号 US201615095324 申请日期 2016.04.11
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 YONEDA Seiichi
分类号 H04N5/369;H01L27/146;H01L31/032;H01L29/24;H01L31/0272;H04N5/374;H01L29/786 主分类号 H04N5/369
代理机构 代理人
主权项 1. An imaging device comprising: a photoelectric conversion element; a first transistor; a second transistor; a third transistor; a fourth transistor; a fifth transistor; a sixth transistor; and a first capacitor, wherein one terminal of the photoelectric conversion element is electrically connected to one of a source electrode and a drain electrode of the first transistor, wherein the other of the source electrode and the drain electrode of the first transistor is electrically connected to one of a source electrode and a drain electrode of the sixth transistor, wherein the other of the source electrode and the drain electrode of the first transistor is electrically connected to one terminal of the first capacitor, wherein one of a source electrode and a drain electrode of the third transistor is electrically connected to the other terminal of the first capacitor, wherein the one of the source electrode and the drain electrode of the third transistor is electrically connected to a gate electrode of the fourth transistor, wherein the other of the source electrode and the drain electrode of the third transistor is electrically connected to one of a source electrode and a drain electrode of the fourth transistor, wherein the other of the source electrode and the drain electrode of the third transistor is electrically connected to one of a source electrode and a drain electrode of the fifth transistor, and wherein the other of the source electrode and the drain electrode of the fourth transistor is electrically connected to one of a source electrode and a drain electrode of the second transistor.
地址 Atsugi-shi JP