Method of fabrication of MOS transistors having electrodes of metallic silicide

摘要

PCT No. PCT/FR86/00163 Sec. 371 Date Jan. 12, 1987 Sec. 102(e) Date Jan. 12, 1987 PCT Filed May 13, 1986 PCT Pub. No. WO86/07190 PCT Pub. Date Dec. 4, 1986.In a method of fabrication of field-effect transistors having very small dimensions, the gate electrode is formed by a first layer of metallic silicide. Insulating embankments are formed along the lateral edges of the gate and a second layer of metallic silicide is then deposited so as to form the source and drain electrodes. At locations in which the second layer covers the first, planning by planarizing etching is performed so as to produce a structure of flat electrodes in which the gate is separated from the source and drain electrodes by a smaller interval than would be possible in the case of separation by photoetching.