发明名称 Semiconductor memory device having erroneous write operation preventing function
摘要 In a semiconductor memory device such as an E2PROM, a write enable signal (WE) is supplied to a buffer formed by an enhancement-type transistor (Q11) and a depletion-type transistor (Q12) having a node (N3). The potential at this node is applied to a set terminal of a flip-flop (FF), and only when the potential at the node is higher than a trip point of the flip-flop, is the flip-flop set to generate an internal write enable signal (IWE) for an actual write operation.
申请公布号 US4791614(A) 申请公布日期 1988.12.13
申请号 US19870063035 申请日期 1987.06.17
申请人 FUJITSU LIMITED 发明人 ARAKAWA, HIDEKI
分类号 G06F12/16;G11C7/22;G11C11/401;G11C16/02;G11C16/22;G11C16/32;G11C17/00;G11C29/00;G11C29/04;(IPC1-7):G11C7/00 主分类号 G06F12/16
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