发明名称 Annealing method for III-V deposition
摘要 A method for producing wafers having deposited layers of III-V materials on Si or Ge/Si substrates is disclosed. The method involves the use of multiple in situ and ex situ annealing steps and the formation of a thermal strain layer to produce wafers having a decreased incidence of defects and a balanced thermal strain. The wafers produced thereby are also disclosed.
申请公布号 US4835116(A) 申请公布日期 1989.05.30
申请号 US19870120024 申请日期 1987.11.13
申请人 KOPIN CORPORATION 发明人 LEE, JHANG W.;MCCULLOUGH, RICHARD E.
分类号 H01L21/20;H01L21/205 主分类号 H01L21/20
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