| 摘要 |
<p>An integrated circuit for dynamic programming comprising an interface circuit (204) with the data and address buses (30) of a master device (40), said interface circuit being connected on the one hand to an internal bus (210) for access to a local memory (21) containing a reference matrix and on the other hand to a sequencing processor (206), to an instruction decoding (207) and control logic circuit and to a program memory (205), the internal bus (210) being likewise connected in parallel to a unit comprising a distance computing processor (203), to a unit comprising an address computing processor (201), to a unit comprising a general computing processor (202), characterised in that the general computing processor (202) is associated with a set of working registers (2020), the number of which is programmable by a GMOD register as a function of the requirements of the programmable local equation which permits the determination of the optimal route to arrive at a point (i,j), and consequently the recognition of a word by referring to the reference matrix, and in that the address computing processor (201) comprises a specialised circuit (20100, 2010) for the computation of the physical addresses of the register (2020) on which the general computing processor (202) performs the computations corresponding to the local equation.</p> |
