| 摘要 |
A microprocessor to which a coprocessor can be connected includes a first terminal to be connected to the coprocessor to receive an operation request signal therefrom and a second terminal to be connected to the coprocessor to supply an operation-acknowledge signal thereto. A detection circuit detects an instruction to be executed by the coprocessor and produces a detection signal. A monitor circuit, responsive to the detection signal, monitors a level of the first terminal to produce an acknowledge signal when the first terminal is at an active level and an interrupt signal when the first terminal is at an inactive level. A circuit responsive to the acknowledge signal outputs the operation-acknowledge signal to the second terminal and a circuit responsive to the interrupt signal generates an interruption request signal to bring the microprocessor into an interruption operation. The microprocessor thereby performs the interruption operation in the absence of the coprocessor.
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