| 摘要 |
This invention relates to a system having a coprocessor being utilized by a processor for floating point double precision operations. The coprocessor utilizes one format for storing double precision data, the processor utilizes a second format for storing double precision data. The communication between the coprocessor and the processor limited to one half of a double precision data at a time. The processor utilizes a loop instruction to generate repetitive commands with incrementing source and destination addresses. Each command transfers data from a source address in the processor to a destination address in the coprocessor and may perform a double precision operation at the destination address. Each command also provides a double precision indication with the command.
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