| 摘要 |
The buffer circuit with high speed and driving ability consists of MOS Trs. (M1)(M2) operating mutually and reversely according to interval input signals (INT-CKT), a transistor (Q2) driven by the output of a MOS Tr(M3), and a transistor (M6) driven by the output of MOS Trs. (M1)(M2). The output level is maximised by by connecting the switching input to the gates of MOS Tr (M1)(M2) , and connecting the switching output to the output of bipolar Tr (Q1)(Q2) and the base of MOS Tr.
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