发明名称 Package on Package (PoP) Bonding Structures
摘要 Various embodiments of mechanisms for forming through package vias (TPVs) with multiple conductive layers and/or recesses in a die package and a package on package (PoP) device with bonding structures utilizing the TPVs are provided. One of the multiple conductive layers acts as a protective layer of the main conductive layer of the TPVs. The protective layer is less likely to oxidize and also has a slower formation rate of intermetallic compound (IMC) when exposed to solder. The recesses in TPVs of a die package are filled by solder from the other die package and the IMC layer formed is below the surface of TPVs, which strengthen the bonding structures.
申请公布号 US2016284677(A1) 申请公布日期 2016.09.29
申请号 US201615178265 申请日期 2016.06.09
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Lin Jing-Cheng;Hung Jui-Pin;Tsai Po-Hao
分类号 H01L25/10;H01L23/31;H01L21/56;H01L23/538;H01L25/00;H01L21/48 主分类号 H01L25/10
代理机构 代理人
主权项 1. A method, comprising: forming a seed layer over a carrier substrate; forming a patterned sacrificial layer over the seed layer, the patterned sacrificial layer including an opening exposing a portion of the seed layer, the opening having a substantially uniform diameter from its topmost edge to its bottommost edge; forming a through via having a substantially planar topmost surface and a substantially planar bottommost surface by: plating a first conductive layer on the seed layer within the opening, andplating a second conductive layer within the opening and on the first conductive layer; removing the patterned sacrificial layer; mounting an integrated circuit die over the carrier substrate; encapsulating the integrated circuit die and the through via in a molding compound; removing a portion of the molding compound to expose a top surface of the integrated circuit die and a top surface of the through via; forming a redistribution structure over the integrated circuit die, the through via, and the molding compound, the redistribution structure electrically contacting the topmost surface of the through via and electrically contacting a contact pad on the top surface of the integrated circuit die; and removing the carrier substrate to expose the bottommost surface of the through via.
地址 Hsin-Chu TW