3D RESIST PROFILE AWARE ETCH-BIAS MODEL

摘要

Systems and techniques for using a three-dimension (3D) resist profile aware etch-bias model are described. A 3D resist profile aware etch-bias model can be calibrated based on empirical data. Next, the 3D resist profile aware etch-bias model can be used in one or more applications, including, but not limited to, lithography verification, etch correction, optical proximity correction, and assist feature placement.

主权项

1. A non-transitory computer-readable storage medium storing instructions that, when executed by a computer, cause the computer to perform a method to determine post-etch patterns on a semiconductor wafer when a photolithography mask is used to print target patterns on the semiconductor wafer by using a semiconductor manufacturing process, wherein the photolithography mask includes mask patterns, and wherein the semiconductor manufacturing process includes a photolithography process and an etching process, the method comprising:
receiving the mask patterns; determining post-development patterns based on the mask patterns and a photolithography model that models the photolithography process; computing etch biases at a set of evaluation points based on the post-development patterns, wherein said computing uses an etch-bias model, and wherein the etch-bias model includes at least one sidewall slope term that is a function of a sidewall slope of a post-development resist layer; and determining the post-etch patterns by adjusting the post-development patterns based on the computed etch biases.