Semiconductor memory device and operating method thereof

摘要

There are provided a semiconductor memory device and an operating method thereof. A semiconductor memory device includes a memory cell array including a plurality of memory cells connected between a source select transistor and a drain select transistor, a peripheral circuit for performing a program operation on the memory cell array, and a control logic for controlling the peripheral circuit such that the potential level of a source control voltage applied to the source select transistor as a selected memory cell is closer to the drain select transistor in a program verify operation during the program operation.

主权项

1. A semiconductor memory device, comprising:
a memory cell array configured to include a plurality of memory cells connected between a source select transistor and a drain select transistor; a peripheral circuit configured to perform a program operation on the memory cell array; and a control logic configured to control the peripheral circuit such that the potential level of a source control voltage applied to the source select transistor is increased by a first offset voltage as a selected memory cell is closer to the drain select transistor in a program verify operation during the program operation, wherein the first offset voltage is a voltage variable according to a channel width of the selected memory cell.