| 摘要 |
The n-bit counter is constructed by connecting n-number of high speed CMOS T-type flip-flops without additional connection of gates. The T-flip flop includes a first latch unit (12) for inverting feedback signal at falling edge of a clock signal, and for latching the inverted signal at rising edge of a clock signal, a second latch unit (13) for inverting signal latched by the first latch unit at rising edge of a clock signal, for latching the inverted signal at falling edge of a clock signal, and for outputting the inverted signal and non-inverted signal as a first and a second output signal, an output feedback unit (14) for feeding back a first or a second output signal of the second latch unit to an input latch unit according to control signal, and a gate unit for providing a control signal to a next stage according to output signals of the second latch unit.
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