| 摘要 |
The invention pertains to a switching method for a common memory based switching field and to the switching field. In the method (1) a plurality of input gates (a<5>...an) receive cells (10), each comprising a header (11) and a payload portion (12); (ii) the header (11) and the payload portion (12) of a cell (10) arriving at the switching field are separated from each other, whereby header conversion operations required for the next link are performed in respect of the header (11), and the payload portion (12) is written to a common memory (24); (iii) and each cell (10) is transmitted via one or more output gates (c<5>...cn) to one or more output lines. In order to optimise practical apparatus for obtaining a faster switching time and, as a result, a larger number of gates for each switching block, packets consisting of a new header obtained from the header conversion and a common memory address of the payload are switched to a time-shared bus (22) which routes each packet to output buffers (b<5>...bn) in a manner known per se; and when each cell is to be transmitted, a corresponding payload portion (12) is read from the common memory (24), said payload portion (12) and said new header are combined into a new cell, and the new cell is transmitted to said one or more output lines. <IMAGE> |
