STACKED CAPACITOR OF DRAM AND ITS MANUFACTURING METHOD

摘要

The capacitor having 1st conductive region (36) and 2nd conductive region (38) formed on substrate (31) consists of 1st polysilicon wall (54') contacting (36) and expanding perpendicular to (31); 2nd polysilicon layer contacting (54') and expanding parallel to (31); 4th layer (54) contacting the top of (54') and expanding parallel to (31); 2nd wall (53') contacting (38) and expanding perpendicular to (31); 1st layer (51) contacting (53') and expanding opposite to (52); 3rd layer contacting the top of (53') and expanding parallel to (51); insulation layer (45) formed under (51); supporting layers expanding parallel to (53); dielectric film (81) formed on (53',54',51-54); and 5th layer (90) formed on (54) contacting (81).