发明名称 Boosting clamping circuit and output buffer circuit using the same
摘要 A boosting-clamping circuit for initially outputting a boosted voltage level, and lowering and clamping the output voltage level to a predetermined level as time elapses, and an output buffer circuit using the same, includes a boosting circuit for receiving a signal to boost and outputting the signal into a high input impedance device and a clamping circuit having one node connected to the output terminal of the boosting circuit and the other node connected to ground, for lowering and clamping the output voltage level of the boosting circuit to a predetermined level as time elapses. The output buffer circuit using the boosting-clamping circuit has a fast response time and a proper output voltage level when outputting a data bit "1," thereby reducing the ground noise during outputting data "0" and improving the response speed of data "0".
申请公布号 US5268600(A) 申请公布日期 1993.12.07
申请号 US19920876527 申请日期 1992.04.30
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 YEU, JEI-HWAN
分类号 H03K5/007;H03K5/12;H03K19/003;H03K19/017;H03K19/0175;H03K19/0948;(IPC1-7):H03K4/58 主分类号 H03K5/007
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