发明名称 Enhancement-depletion mode cascode current mirror
摘要 An improved current source having high output impedance, low saturation voltage, and less sensitivity to process parameters is achieved by having enhancement P-channel transistor devices used as current mirror, while depletion P-channel transistor devices are provided as the cascode devices. A "diode connected" depletion device may be inserted between the enhancement gate and the drain of the current reference transistor to reduce saturation voltage. The "diode connected" depletion device keeps the drains of the enhancement devices at a similar voltage even when the enhancement and depletion device threshold, i.e. VT, do not track over temperature or process. Thus, the current mirror circuit provides not only higher output impedance, lower saturation voltage, but is also less sensitive to process variation.
申请公布号 US5311115(A) 申请公布日期 1994.05.10
申请号 US19930104827 申请日期 1993.08.11
申请人 NATIONAL SEMICONDUCTOR CORP. 发明人 ARCHER, DONALD M.
分类号 G05F3/26;H01L27/088;H03F3/343;H03F3/345;(IPC1-7):G05F3/16 主分类号 G05F3/26
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