Semiconductor device

摘要

Provided is a semiconductor device which can operate stably even in the case where a transistor thereof is a depletion transistor. The semiconductor device includes a first transistor for supplying a first potential to a first wiring, a second transistor for supplying a second potential to the first wiring, a third transistor for supplying a third potential at which the first transistor is turned on to a gate of the first transistor and stopping supplying the third potential, a fourth transistor for supplying the second potential to the gate of the first transistor, and a first circuit for generating a second signal obtained by offsetting a first signal. The second signal is input to a gate of the fourth transistor. The potential of a low level of the second signal is lower than the second potential.

主权项

1. A semiconductor device comprising:
a shift register comprising a flip-flop circuit, wherein the flip-flop circuit comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a capacitor, a first wiring, a second wiring, a third wiring, and a fourth wiring, wherein one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor, wherein one of a source and a drain of the third transistor is electrically connected to one of a source and a drain of the fourth transistor, wherein the one of the source and the drain of the third transistor is electrically connected to a gate of the first transistor, wherein a gate of the fourth transistor is electrically connected to a gate of the second transistor, wherein one of a source and a drain of the fifth transistor is electrically connected to a gate of the third transistor, wherein the one of the source and the drain of the fifth transistor is electrically connected to a first electrode of the capacitor, wherein the other of the source and the drain of the first transistor is electrically connected to the first wiring, wherein the other of the source and the drain of the second transistor is electrically connected to the second wiring, wherein the other of the source and the drain of the third transistor is electrically connected to the third wiring, wherein the other of the source and the drain of the fourth transistor is electrically connected to the second wiring, wherein the other of the source and the drain of the fifth transistor is electrically connected to the fourth wiring, and wherein a second electrode of the capacitor is electrically connected to the third wiring.