发明名称 Detection of exponent underflow and overflow in a floating point adder
摘要 An exponent subtractor system (226) for a floating point adder (200) generates an exponent result (EXP-low) and a rounded exponent result (EXP-high) for an addition operation performed on two floating point numbers and generates overflow (Overflow-low, Overflow-high) and underflow flags (Underflow-low, Underflow-high) for the exponent result and the rounded exponent result before the completion of the updating of the exponent result in an exponent subtractor (52, 72).
申请公布号 US5408427(A) 申请公布日期 1995.04.18
申请号 US19940194534 申请日期 1994.02.10
申请人 MOTOROLA, INC. 发明人 EINAJ, ALICK;HOREN, YORAM;VOLPERT, YEHUDA
分类号 G06F7/00;G06F7/38;G06F7/485;G06F7/50;G06F7/507;G06F7/76;(IPC1-7):G06F7/38 主分类号 G06F7/00
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