发明名称 |
Flash EEPROM array with P-tank insulated from substrate by deep N-tank |
摘要 |
In accordance with one embodiment of the invention, a nonvolatile memory array is encased in a P-tank, and the P-tank encased in a deep N-tank, the two tanks separating the memory array from the substrate and from the other circuitry of the integrated memory circuit. The deep N-tank allows application of a negative voltage of perhaps -8 V to the P-tank encasing the memory array. Application of that negative voltage permits the cells of the memory array to be programmed with voltage pulses having a peak value of about +10 V, rather than the +18 V peak value of prior-art memory arrays. Because the external circuitry, such as the wordline driver circuit, need drive the wordlines at +10 V rather than +18 V, the invention permits construction of that external circuitry using thinner gate insulators and space-saving shorter dimensions.
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申请公布号 |
US5411908(A) |
申请公布日期 |
1995.05.02 |
申请号 |
US19920890577 |
申请日期 |
1992.05.28 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
SANTIN, GIOVANNI;NASO, GIOVANNI;D'ARRIGO, SEBASTIANO;SMAYLING, MICHAEL C. |
分类号 |
H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/70 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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