发明名称 Block buffer for instruction/operand caches
摘要 A method of and apparatus for efficiently transferring data between a memory system and an instruction processor having a dedicated cache memory. A read request within the instruction processor for a data element not currently stored within the dedicated cache memory creates a read cache miss condition. A transfer of the eight word block containing the requested data element is initiated from the memory system beginning with the 72 bit double word containing the requested data element. The eight word block of data is placed into a block buffer upon being received by the instruction processor. The instruction processor is permitted to resume instruction execution and access to the cache memory as soon as the requested data element has been received by the block buffer. The eight word data block is transferred from the block buffer to cache memory at the next read cache miss condition. The block buffer has a no save designator for block transfers and other accesses for which near term subsequent access to buffered data is unlikely. Data designated no save is not transferred from the block buffer to the cache memory.
申请公布号 US5423016(A) 申请公布日期 1995.06.06
申请号 US19920840464 申请日期 1992.02.24
申请人 UNISYS CORPORATION 发明人 TSUCHIYA, KENICHI;BOONE, LEWIS A.;HAUPT, MICHAEL L.;ADELMEYER, THOMAS
分类号 G06F12/08;(IPC1-7):G06F13/00 主分类号 G06F12/08
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