| 摘要 |
A signal frequency conversion circuit, comprising: a pre-stage frequency conversion module (401, 501, 601) and at least one series-connected post-stage frequency conversion module (402, 502, 602). The pre-stage frequency conversion module (401, 501, 601) comprises a first filter (4011, 5011, 6011) and a numerically controlled oscillator (NCO) (4012, 5012, 6012). An output end of the first filter (4011, 5011, 6011) is connected to an input end of the NCO (4012, 5012, 6012). Each post-stage frequency conversion module (402, 502, 602) comprises a second filter (4021, 5021, 6021) and a post-stage frequency conversion unit (4022, 5022, 6022). An output end of the second filter (4021, 5021, 6021) is connected to an input end of the post-stage frequency conversion unit (4022, 5022, 6022). An output end of the NCO (4012, 5012, 6012) is connected to an input end of the second filter (4021, 5021, 6021) of a first post-stage frequency conversion module (402, 502, 602) in the at least one series-connected post-stage frequency conversion module (402, 502, 602). By means of the signal frequency conversion circuit, a frequency conversion requirement for an input signal is achieved by means of multi-stage frequency conversion, and complex processing logics for achieving an NCO on a high-expansion clock and achieving a multiplier and an adder required by the NCO are avoided, thereby reducing the cost and power consumption of the signal frequency conversion circuit. |
