COMBINED ADDER AND PRE-ADDER FOR HIGH-RADIX MULTIPLIER CIRCUIT

摘要

Circuitry accepting a first input value and a second input value, and outputting (a) a first sum involving the first input value and the second input value, and (b) a second sum involving the first input value and the second input value, includes a first adder circuit, a second adder circuit, a compressor circuit and a preprocessing stage. The first input value and the second input value are input to the first adder circuit to provide the first sum. The first input value and the second input value are input to the preprocessing stage to provide inputs to the compressor circuit, which provides first and second compressed output signals which in turn are input to the second adder circuit to provide the second sum. The preprocessing stage may include circuitry to programmably zero the first input value, so that the first sum is programmably settable to the second input value.

主权项

1. Circuitry accepting a first input value and a second input value and outputting (a) a first sum involving said first input value and said second input value, and (b) a second sum involving said first input value and said second input value, said circuitry comprising:
a first adder circuit; a second adder circuit; a compressor circuit; and a preprocessing stage; wherein: said first input value and said second input value are input to said first adder circuit to provide said first sum; said first input value and said second input value are input to said preprocessing stage to provide inputs to said compressor circuit, said compressor circuit providing first and second compressed output signals; said first and second compressed output signals are input to said second adder circuit to provide said second sum.