发明名称 SIGNAL CONVERTER
摘要 PURPOSE: To attain an operation with the limited number of pins and various serial data input formats by dividing the master lock signal of a signal converter having a three wire serial interface. CONSTITUTION: All three functions can be obtained by using a pin 2 of a D/A converter IC20. When it is necessary for a user to report the change of a de- emphasis DEM filter, an inside serial clock SCLC is automatically generated by using the pin 2 as a static DEM control pin DEM. For example, in a system in which serial data SDATA are asynchronous with a master clock MSCLK, when the user necessitates an outside SCLK, the switching of the DEM is automatically unnecessitated by using the pin 2 as the SCLK input. In any case, when it is necessary for the user to operate with an SDATA format except an initialization format, a 8 bit constitution sequence CONFIG is applied to the pin 2. As a result, the maximum flexibility can be obtained with the limited number of pins.
申请公布号 JPH088750(A) 申请公布日期 1996.01.12
申请号 JP19950084951 申请日期 1995.03.15
申请人 CRYSTAL SEMICONDUCTOR CORP 发明人 JIYON JIEI POUROSU;GOUSAMU DEII KAMASU;ANDORIYUU DABURIYU KUROONE
分类号 H03M1/66;G06F13/38;H03M3/02;H03M7/32;(IPC1-7):H03M3/02 主分类号 H03M1/66
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