发明名称 |
Oscillator circuit and method of generating a clock signal |
摘要 |
An oscillator circuit of the type comprising a flip-flop for generating a clock signal and two comparators for comparing a reference voltage with the voltage across a first capacitor which is charged during a first cycle of the clock signal and the voltage across a second capacitor which is charged during a second cycle of a clock signal provides a means for removing the effects of any offset in either comparator. This is achieved by reversing the inputs of the comparators for each cycle of the output frequency. Thus an offset in a comparator which would increase the clock period on one cycle will reduce the period of the next cycle by the same amount. As a net result, the period of time over two clock periods will stay constant regardless of any offset drift in a comparator. |
申请公布号 |
US9507373(B2) |
申请公布日期 |
2016.11.29 |
申请号 |
US201314899170 |
申请日期 |
2013.07.04 |
申请人 |
Freescale Semiconductor, Inc. |
发明人 |
Bode Hubert;Wendel Dirk |
分类号 |
G06F1/04;G06F1/08;H03K3/0231;H03K3/023 |
主分类号 |
G06F1/04 |
代理机构 |
|
代理人 |
|
主权项 |
1. An oscillator circuit for providing a clock signal, the oscillator circuit comprising:
a comparator; a varying voltage source and a voltage reference arranged to carry a reference voltage for connection to first and second inputs of the comparator respectively, wherein the comparator is arranged to compare a varying voltage source with a reference voltage; and a control device arranged to periodically reverse the inputs to the comparator. |
地址 |
Austin TX US |