发明名称 |
Low voltage CMOS to low voltage PECL converter |
摘要 |
A means of converting low voltage CMOS logic levels operating with a 3.3 volts logic level to low voltage PECL logic levels operating with a 3.3 volts supply voltage and a 0.8 volts logic level. The circuit design is process insensitive, and the characteristics of the converter emulate the emitter follower outputs of ECL devices. The converter solves the signal ringing problems caused by open output conditions, and is less susceptible to electromagnetic interference.
|
申请公布号 |
US5633602(A) |
申请公布日期 |
1997.05.27 |
申请号 |
US19950528445 |
申请日期 |
1995.09.14 |
申请人 |
NCR CORPORATION |
发明人 |
SANWO, IKUO J.;RUSSELL, JOSEPH D.;LIN, JUEI-PO |
分类号 |
H03K19/003;H03K19/0185;(IPC1-7):H03K19/018 |
主分类号 |
H03K19/003 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|