Solid-state imaging device, manufacturing method of solid-state imaging device, manufacturing method of semiconductor device, semiconductor device, and electronic device

摘要

A solid-state imaging device has a sensor substrate having a pixel region on which photoelectric converters are arrayed; a driving circuit provided on a front face side that is opposite from a light receiving face as to the photoelectric converters on the sensor substrate; an insulation layer, provided on the light receiving face, and having a stepped construction wherein the film thickness of the pixel region is thinner than the film thickness in a periphery region provided on the outside of the pixel region; a wiring provided to the periphery region on the light receiving face side; and on-chip lenses provided to positions corresponding to the photoelectric converters on the insulation layer.

主权项

1. A semiconductor device comprising:
a sensor substrate including:
a first semiconductor substrate,a first wiring layer formed at a first main surface side of the first semiconductor substrate,an insulating material layer formed at a second main surface side of the first semiconductor substrate,a connecting conductive layer formed on the insulating material layer, wherein an upper surface side of the connecting conductive layer includes a concave portion,a first film formed on the connecting conductive layer and covering an inner face of the concave portion of the connecting conductive layer, anda second film formed on the first film, wherein at least a portion of the first film and the second film are within the concave portion; and a logic substrate including:
a second semiconductor substrate, anda second wiring layer formed at a first main surface side of the second semiconductor substrate, wherein,
the sensor substrate and the logic substrate are bonded together such that the first wiring layer faces the second wiring layer, andthe connecting conductive layer electrically connects a first wiring in the first wiring layer and a second wiring in the second wiring layer.